Conventionally, a frequency multiplier utilizes the non-linearity of transistors, such as a field effect transistor (FET), a bipolar transistor, and the like. By grounding the transistors common terminals and by operating it at or around the pinch-off region of its functionality, the frequency multiplier is configured to generate a high frequency wave.
FIG. 7 shows a circuit diagram of a conventional frequency multiplier that uses FETs. The circuit in FIG. 7, as described in Japanese Patent 2,998,837 (JP '837), is a combination of a microwave frequency multiplier and an amplifier. In FIG. 7, the frequency multiplier includes an input node 11, an output node 12, an FET 110 with its source coupled to the ground, an input impedance matching circuit 130, an output matching circuit 160, a stub circuit 150 for the short-circuiting of a fundamental wave from an output terminal of the FET 110. When the FET 110 is operated at or around the pinch-off region, the waveform of the output electric current has a half-wave rectified form, and includes, in its output spectrum, many high frequency wave components that are generated to have an even-ordered multiplication of the input frequency. Among the output waves in such output spectrum, a wave having the greatest output power is a double wave. Therefore, when the fundamental wave is inputted to the circuit in FIG. 7, the output signal has a two-fold frequency of the fundamental wave.
The source of the FET 110 is grounded, and, between the gate of the FET 110 and a input node 11, transmission lines L1, L2, L3 are disposed to the input impedance matching circuit 130. Further, the drain terminal 19 of the FET 110 is coupled to the stub circuit 150, and the other end of the stub circuit is held in an open condition, which serves as a suppression circuit of the fundamental wave. The drain terminal 19 of the FET 110 is also coupled to an impedance matching circuit 170 that includes transmission lines L5, L6 and L7.
An FET 120 is a transistor serving as an amplifier, and yields a gain from the double wave. The output matching circuit 160 includes transmission lines L8, L9, L10, and serves as a part of an amplifier, and matches the output impedance of the FET 120 with its load (i.e., generally 50Ω). Further, a DC cut capacitor 17 between the FET 110 and the FET 120 is coupled for the purpose of removing or blocking the direct current component. The stub circuit 150 is an open stub (i.e., having an open end), having a dimension of one fourth of the wavelength of the fundamental wave. The stub circuit 150 serves as an open stub for the double wave, since the wavelength of the double wave is equal to one half of the wavelength of the fundamental wave. Therefore, the stub circuit 150 does not affect the impedance when the double wave is taken out from the output terminal.
However, the stub circuit 150 having the one-fourth wavelength of the fundamental wave is large, thereby making it difficult for the frequency multiplier to be a small size. For example, if a frequency multiplier is constructed on a Si substrate for the fundamental wave having the frequency of 1 GHz, the dimension of the frequency multiplier is as large as 20 mm.
A circuit configuration having a smaller circuit is also disclosed in JP '837, and is shown in FIG. 8. In this example, an inductor 804 and a capacitor 805 are connected to the drain terminal 19 of the FET 110, for the resonance of the fundamental wave. The resonance frequency fr of the resonator 820 having the inductor 804 and the capacitor 805 is represented by Equation 1 below.
                              f          r                =                  1                      2            ⁢                                                  ⁢            π            ⁢                          LC                                                          Equation        ⁢                                  ⁢        1            
In such circuit, the inductor 804 has a size of about 300 to 400 μm, and, the capacitor 805 can be smaller than the inductor 804. However, it is necessary for such circuit to have an impedance matching circuit 840 that is constituted as a combination of an inductor 806 and a capacitor 807 in a latter stage next to the resonator 820, thereby making such circuit still difficult to have a reduced circuit size.
As described above in the example circuits of FIGS. 7 and 8, the fundamental wave short-circuiting circuit is connected to an output side (i.e., the drain terminal 19) of the FET 110, which is formed either as (i) the stub circuit 150 having a one-fourth wavelength of the fundamental wave or (ii) the resonator 820 constituted as a combination of the inductor 804 and the capacitor 805, and, in a latter stage of such circuit, an impedance matching circuit (30, 840) is connected. In such configuration, suppression of the fundamental wave and matching of impedance are respectively borne by different circuits, thereby making it difficult to achieve a reduced circuit size.